Item – Theses Canada

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OCLC number
46524017
Author
Chen, Feng,1963-
Title
Design techniques for CMOS low power passive sigma delta modulator.
Degree
Ph. D. -- University of Waterloo, 1996
Publisher
Ottawa : National Library of Canada = Bibliothèque nationale du Canada, 1997.
Description
2 microfiches.
Notes
Includes bibliographical references.
Abstract
In this thesis, low power techniques for IF digitization have been investigated. A low power passive sigma-delta $(\Sigma\Delta)$ modulator is analyzed and designed. Issues of using the lowpass passive $\Sigma\Delta$ modulator with a built-in switch mixer for IF digitization are also studied. In addition, a switch-only gain-boost network is proposed to achieve a DC voltage gain in a passive way. The passive architecture of a $\Sigma\Delta$ modulator is investigated at both system and circuit levels. At the system level, a linear model is proposed. Analysis shows that the resolution of the quantizer plays a key role in determining the overall signal-to-noise ratio. This has been confirmed by system level simulation. It is also shown that the placement of the loop filter poles is the most important part of the design of a passive $\Sigma\Delta$ modulator. A design example of thr passive $\Sigma\Delta$ that uses a 2nd-order RC cascaded lowpass passive filter is given. Since the quantizer is the only active component, the passive $\Sigma\Delta$ modulator can achieve a significant amount of power saving, compared to an active $\Sigma\Delta$ modulator. Experimental results shows that the lowpass passive $\Sigma\Delta$ modulator is also promising for IF digitization at 10 MHz when it is combined with a built-in mixer. In addition, a switch-only gain-boost network is proposed to provide a DC voltage gain in a passive way. A special timing scheme is proposed to suppress the charge injection error in the network. An example of its application in a passive $\Sigma\Delta$ modulator is given. Analysis and simulation results show that the resolution requirement on the comparator (single-bit quantizer) is relaxed with the introduction of the gain-boost network into the loop filter. Experimental results demonstrate a 6 dB improvement of noise performance with the gain-boost network at a 10 MHz sampling rate.
ISBN
0612152944
9780612152946